FPGA CPU News of December 2001


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Monday, December 10, 2001
Semiconductor Business News: Lattice to acquire Agere's FPGA business for $250 million. "Lattice will also acquire certain intellectual property cores and patents that re [sic] unique to Agere's FPGA business."

It was not so long ago that AT&T Microelectronics's ORCA FPGA family was quite competitive with those of Xilinx and Altera.

Anthony Cataldo, EE Times: Lattice prepares to enter FPGA fray.

"Even so, patent filings indicate the company has been working on a homegrown FPGA technology for about five years."
Good luck. The more the merrier.

John Jakson's T2 Transputer web site. Interesting. I have been thinking in this direction too, except each FPGA should host a great many processors, and perhaps several SDRAM channels. I am also looking forward to the forthcoming Virtex-II Pro's 3.125 Gb/s links (and 4 links supposedly bondable to do 10 Gb/s) as a native interconnect. Of course, 10 Gb/s is a factor of 500 faster than the old T414's 20 MB/s links; that's a 29 improvement in approximately 16 years.

Tuesday, December 4, 2001
NuHorizons's new Spartan-IIE development board. It's rather, shall we say, spartan, but $99 marks a new low price point.

Forget Ginger. Here's something really intesting and (perhaps) important. Matrix Semiconductor unveils its 3-D semiconductor technologies. Actual details are sketchy. Photo. It appears their first products will be a high-density, cheap-per-bit PROM. Former Xilinx Senior VP Dennis Segers is the President and CEO of Matrix Semiconductor.

Hmm, taking chemical-mechanical planarization to extremes? Hmm, multiple active layers? Hmm, once they lay out one layer of PROM or whatever, do they then deposit a new bulk Si substrate layer and build a new layer of transistors in that? Hmm, somehow making vertical contacts between active layers? Hmm, I wonder if it will work for logic (not just memory) -- probably terrible heat (and maybe power supply) issues! Hmm, I wonder how you model yields and defects?

Tony Smith, The Register: Rambus founder's Matrix unveils first 3D memory chip.

Semiconductor Business News: Start-up prepares to deliver first 3-D memory chips: "Memory cards based on Matrix 3-D Memory will be write-once..."

One more thing. Remember: an FPGA is (more or less) just a great big memory (SRAM or FLASH ROM) that drives some muxes and pass gates and buffers. If a vendor can fabricate a humongous (and cheap) PROM, then perhaps it can also fabricate a humongous (and cheap) programmable logic device...

[updated 12/11/01]
Thomas H. Lee, Matrix Semiconductor, in Scientific American: A Vertical Leap for Microchips.

"Building directly on these 2-D technologies, we have made 3-D circuits by coating standard silicon wafers with many successive layers of polysilicon (as well as insulating and metallic layers), polishing the surface flat after each step. Although electrons do not move quite as easily in polysilicon as they do in the single-crystal kind, research has produced 3-D transistors with 90 to 95 percent of the electron mobility seen in their 2-D counterparts. "

FPGA CPU News, Vol. 2, No. 12
Back issues: Vol. 2 (2001): Jan Feb Mar Apr May Jun Jul Aug Sep Oct Nov; Vol. 1 (2000): Apr Aug Sep Oct Nov Dec.
Opinions expressed herein are those of Jan Gray, President, Gray Research LLC.

Copyright © 2000-2002, Gray Research LLC. All rights reserved.
Last updated: Mar 02 2002