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03/05/02 Multiprocessors, Jan's Razor, resource sharing, and all that
03/04/02 Virtex-II Pro is shipping
03/02/02 60 RISC CPUs in one V600E
02/28/02 FPGA power challenge
02/14/02 ARM history
02/11/02 Stratix launch
02/02/02 Nixie clocks
02/01/02 Minimal CPU in a 32-macrocell CPLD
01/27/02 New OpenCores.org CPU cores; IP shakeout; not much new
01/16/02 CoolRunner-II launch; picoTurbo and Lexra settle
12/10/01 Lattice to acquire Agere's FPGA business; Jakson's T2 Transputer site
12/04/01 Matrix Semi
11/24/01 RISC CPU in 48 hours; Virtex-II Pro sighting
11/23/01 Porting the Lexra LX4189 to an XCV1000
11/22/01 Fast thread context switching FPGA CPU ideas
11/21/01 Self-generating processors; FPGA supers; Microtronix's uClinux kit for Nios
11/20/01 Spartan-IIE; return address linkage
11/15/01 Happy 30th birthday to the Intel 4004
11/11/01 Reconfigurable logic in SRC supercomputers
11/09/01 PDP-4/X
11/06/01 FPX KCPSM: an FPGA CPU in the network
11/04/01 FPGA evolution; RC on slashdot
11/02/01 FPGA CPU IP business models; ARM7 clone disappears
10/31/01 Branch instructions and alternatives; more Empower! and Excalibur
10/30/01 FPGA prototyping boards; FPGA MP3; Altera LogicLock
10/28/01 DCT lightfoot Java processor
10/26/01 Still more on Altera EPXA10 (Excalibur/ARM)
10/23/01 Quartus-II Web Ed.
10/22/01 Pushing on a rope; one LUT per bit ALU design; bumming LUTs; free FPGAs
10/18/01 Yet more Altera Excalibur ARM news
10/17/01 FPGA CPUs in education; more Altera and Xilinx news
10/16/01 Sacrificing silicon at the altar of programmability
10/15/01 Xilinx ships MicroBlaze; peripherals; Nios 2.0; Excalibur ARM
10/14/01 FPGA CPUs at MPF; more cache design notes
10/12/01 Designing for caches and SDRAM
10/10/01 Nios laps MicroBlaze; Excalibur and MIPS; XESS XSA-100; ISE 4.1i; and WebPack; PLD patents; HardCopy; SignOnce; old tools graveyard; far branches
09/06/01 Prototyping platforms; Microsoft and MIPS
08/31/01 .NET Reflection and custom attributes; JHDL; FPGA power
08/22/01 .NET in hardware?
08/21/01 Drinking the .NET Kool-Aid; more FPGA coprocessors with SDRAM interfaces; Terabit Networking Forum.
08/15/01 Xilinx's 10 Gb/s ethernet MAC.
08/11/01 On FPGAs as PC Coprocessors, redux; Nuron AcB.
08/10/01 IP Semi's SpeedRouter; FPGA NPUs.
08/06/01 Rapid Prototypes' reconfigurable success story.
08/03/01 Bits and bites: FPL; PDP-8/X; whatever became of?
08/01/01 More catch up: System ACE; QuickMIPS.
07/31/01 Catching up: xr16vx; Atlantic; patent settlement; Elixent; Nios uptake.
06/18/01 MicroBlaze at 70 "D-MIPS".
05/29/01 My80.
05/23/01 Nios vs. MicroBlaze.
05/14/01 Xilinx v. Altera again.
05/13/01 Nick Tredennick on 'dynamic logic'; BlueArc network filer FCCM.
05/08/01 New GPL'd DSP soft core under development.
04/29/01 Comp.arch.fpga archives.
04/26/01 More on Apex-II, etc.
04/24/01 Proceler; Apex-II; dog gates.
04/23/01 Xilinx sees the multiprocessor SoC light.
04/21/01 XC3020-based CPU.
04/19/01 The GCC imperative.
04/15/01 Fun with DLLs.
04/09/01 MicroBlaze launch.
03/26/01 Fault tolerant LEON; MP configurable processors in the news.
03/18/01 On hybrid soft CPUs and custom datapaths.
03/11/01 New tutorial from XESS.
03/09/01 New GR CPUs page and kit.
03/04/01 Extreme ultraviolet.
03/02/01 "FPGA vendors will rule platform roost".
02/28/01 Earthquake.
02/27/01 MPR on Xilinx.
02/26/01 Mercury impressions.
02/21/01 Altera Mercury announcement.
02/18/01 How the Puerco was born.
02/14/01 Chameleon.
02/10/01 The shape of FPGAs to come.
02/01/01 Sez you dept.
01/29/01 On reimplementations of existing instruction set architectures.
01/27/01 fpga-cpu list moved.
01/25/01 Xilinx XtremeDSP simulcast.
01/22/01 Triscend to also embed Hitachi SuperH.
01/20/01 Insight V600E development kit, adventures of a JTAG newbie.
01/19/01 Disman on Virtex-II.
01/16/01 Marketing gates redux.
01/15/01 Virtex-II launch.
01/04/01 Disman on high-speed serial links.
12/04/00 Xilinx v. Altera cont'd.
12/01/00 SRL16E tutorial; new GR0040 SoC paper (annotated Verilog).
11/20/00 XtremeDSP; More patent PR.
11/17/00 "Xilinx Wins Patent Case Against Altera".
11/16/00 .NET ECMA submissions
11/15/00 8-way multiprocessor in an XCV50E.
11/12/00 Virtex-optimized adder/mux circuit.
11/10/00 Synopsys' C-to-RTL flow.
11/09/00 XESS WebPACK tutorial; Xilinx Platform FPGA analysis.
11/06/00 Xilinx Platform FPGA.
11/04/00 Xilinx links to us; 70 nm MOS transistor; assembling variable-length instructions.
11/03/00 Xilinx Alliance Elite; free WebPACK ISE released.
10/28/00 XSOC/xr16 in c't; tao of static timing analysis.
10/27/00 RPMs in Synplify Verilog; the state of FPGA tools.
10/23/00 FPGA CPU core network processors.
10/22/00 GR0000 simple FPGA CPU explained; new uP1232 FPGA CPU; new PLD CPUs.
10/21/00 Cisco's network processors.
10/17/00 FPGA design security; Virtex-II triple DES.
10/10/00 XSOC/xr16 in Virtex.
10/09/00 Space flight applications; Pact GmbH's XPP-128; ARC Tangent.
10/07/00 Ultra-compact FPGA RISC CPUs.
10/06/00 Xilinx's KCPSM 8-bit FPGA MCU; Ericcson's Erlang FPGA CPU; Leon SPARC does AMBA.
10/05/00 Xilinx acquires RocketChips.
10/03/00 Painless specs; CoreConnect on FPGAs.
10/02/00 Xilinx announces free WebPACK for FPGAs; IP business models analysis.
09/29/00 Remembering Trudeau.
09/27/00 Lineo demonstrates uCLinux on LEON SPARC on XCV800.
09/25/00 My ESC talk; Xilinx announces 3.125 Gbps serial links; Altera announces ARM and MIPS hard CPU cores details; Altera FPGA CPU papers; Triscend A7 with ARM7TDMI.
09/24/00 XSE 2.1i ships.
09/22/00 Wrestling for influence in the 3G phone market; Xilinx formal verification tools.
09/21/00 Green Mountain GM HC11 FPGA CPU; site stats.
09/20/00 Brian Davis' YARD-1A; Virtex Power Estimator.
09/19/00 Theme: simple is beautiful.
09/18/00 MPR covers FPGA CPUs; Ingo Cyliax articles.
09/16/00 eASIC programmable logic for ASICs; big companies vs. individual artists.
09/15/00 LEON SPARC; Rob Finch's Sparrow; our GR2000 24-bit instruction 16/32-bit data RISC; EDN on soft cores; working on many fronts.
08/30/00 Hot Chips links.
08/29/00 FPSLIC ships; first fibs.
08/28/00 FPGA datapaths from software inner loops; Triscend adds ARM; Xilinx University Resource Center; IBIS backgrounder.
08/23/00 Kentron's Quad Band SDRAM.
08/22/00 Xilinx high level language synthesis.
08/21/00 Soft cores in a hard world.
08/19/00 CNets open sourced; Dave Conroy's PDP-8/X; Andraka links.
08/18/00 Circuit Cellar on Excalibur; Lucent hybrid FPGA; The Joel Test.
08/17/00 MMIXware; Veriwell; catching up on Altera Excalibur, Nios, and Xilinx ARC cores alliance and PowerPC announcements.
08/13/00 CNets emits Verilog.
08/11/00 Announcing CNets.
08/07/00 Porting xr16 to Virtex; block RAMs; The Knowledge.
08/04/00 Teaching computer architecture with FPGA CPU/SoCs.
04/07/00 Announcing Circuit Cellar articles on XSOC/xr16.

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Last updated: Mar 05 2002