The third Circuit Cellar article is now available at http://www.circuitcellar.com/pastissues/articles/gray118/gray118.pdf.
Added a synthesizable Verilog version of XSOC/xr16 to the project:
Added xsocv.pdf, xsocv\ (synthesizable Verilog XSOC/xr16).
Added tests\ (xr16 test suite).
Added contrib file.
Updated Getting Started Guide, issues, and other files.
Fixed issues #10,15,18-20.
The second Circuit Cellar article is now available at http://www.circuitcellar.com/pastissues/articles/gray117/gray117.pdf.
The first Circuit Cellar article is now available at http://www.circuitcellar.com/pastissues/articles/gray116/gray116.pdf.
Misc fixes to Getting Started Guide: DOS prompts, PATHs.
Removed encryption from doc\*.pdf.
Fixed issues #12-13.
Minor documentation fixes, most in Getting Started Guide
Beta test begins. Please remember to report your beta test
experiences to fpga-cpu @egroups.com. Thank you.